Hydrogenated amorphous silicon (a-Si:H) has been already considered for the objective of passive optical elements, like waveguides and ring resonators, within photonic integrated circuits at λ = 1.55 μm. However the study of its electro-optical properties is still at an early stage, therefore this semiconductor in practice is not considered for light modulation as yet. We demonstrated, for the first time, effective electro-optical modulation in a reverse biased a-Si:H p-i-n waveguiding structure. In particular, phase modulation was studied in a waveguide integrated Fabry-Perot resonator in which the VπLπ product was determined to be 63 Vcm. Characteristic switch-on and switch-off times of 14 ns were measured. The device employed a wider gap amorphous silicon carbide (a-SiC:H) film for the lower cladding layer instead of silicon oxide. In this way the highest temperature involved in the fabrication process was 170°C, which ensured the desired technological compatibility with CMOS processes.

Electro-optical modulation at 1550 nm in an as-deposited hydrogenated amorphous silicon p-i-n waveguiding device

DELLA CORTE, Francesco Giuseppe;S. RAO;
2011

Abstract

Hydrogenated amorphous silicon (a-Si:H) has been already considered for the objective of passive optical elements, like waveguides and ring resonators, within photonic integrated circuits at λ = 1.55 μm. However the study of its electro-optical properties is still at an early stage, therefore this semiconductor in practice is not considered for light modulation as yet. We demonstrated, for the first time, effective electro-optical modulation in a reverse biased a-Si:H p-i-n waveguiding structure. In particular, phase modulation was studied in a waveguide integrated Fabry-Perot resonator in which the VπLπ product was determined to be 63 Vcm. Characteristic switch-on and switch-off times of 14 ns were measured. The device employed a wider gap amorphous silicon carbide (a-SiC:H) film for the lower cladding layer instead of silicon oxide. In this way the highest temperature involved in the fabrication process was 170°C, which ensured the desired technological compatibility with CMOS processes.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/20.500.12318/7697
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