The electrical characteristics of a 4H silicon carbide (4H-SiC) MOSFET are investigated by means of a multi-objective genetic algorithm (MOGA) in order to overcome the existing tradeoff between the main device figures of merit such as the breakdown voltage, drain current, and ON-state resistance. The aim of the work is to achieve an optimized device for a specific application. In particular, without loss of generality, we refer to a dual-implanted MOSFET (DMOSFET) dimensioned for use as low-power transistor in DC-DC converters for solar power optimizers. Typical blocking voltages of these transistors are, in fact, around 150 V. For our investigation, both analytical and numerical models are used as objective functions to determine via MOGA a set of optimized physical and geometrical device parameters that meet the application constraints minimizing the ON-state resistance (RON). The optimized DMOSFET performs a RON value of a few hundred kΩ×µm2 for different breakdown voltages in the range 150-800 V.

Multiobjective optimization of design of 4H-SiC power MOSFETs for specific applications

F. PEZZIMENTI
Membro del Collaboration Group
;
G. De Martino
Membro del Collaboration Group
;
F. G. Della Corte
Membro del Collaboration Group
2019-01-01

Abstract

The electrical characteristics of a 4H silicon carbide (4H-SiC) MOSFET are investigated by means of a multi-objective genetic algorithm (MOGA) in order to overcome the existing tradeoff between the main device figures of merit such as the breakdown voltage, drain current, and ON-state resistance. The aim of the work is to achieve an optimized device for a specific application. In particular, without loss of generality, we refer to a dual-implanted MOSFET (DMOSFET) dimensioned for use as low-power transistor in DC-DC converters for solar power optimizers. Typical blocking voltages of these transistors are, in fact, around 150 V. For our investigation, both analytical and numerical models are used as objective functions to determine via MOGA a set of optimized physical and geometrical device parameters that meet the application constraints minimizing the ON-state resistance (RON). The optimized DMOSFET performs a RON value of a few hundred kΩ×µm2 for different breakdown voltages in the range 150-800 V.
2019
4H-SiC MOSFET, power device, design optimization, on-state resistance, blocking voltage
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12318/697
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